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The 6509s: The P500, B128/256, B500, 600, 700, BX128/256

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Intending to use pictures or text from this page? Please read this notice. Last modify 11 August 2020.

Lots of thanks to Ullrich von Bassewitz and Andre Fachat who alerted me to various inaccuracies in the original specs, thanks to about a megabyte's worth of E-mail exchanged within a twelve-hour period one fine August day. :-) Also big thank-yous are owed to Hans Franke, who filled in the checkered history of these European denizens, and to Steve Gray for some of their pre-history. As all the 6509 units owe significant portions of their development to each other, it only makes sense to discuss their history in general before getting down to the specific models.

The B/P series of computers, sometimes known as the CBM-II series, were intended to be followups to Commodore's PET series on the high end of their product line (in the same way that the 264 series were to herald Commodore's new age of home computers). Their first idea, says Hans, was to develop two lines: the B500, as the "B"usiness model, and the P500, as the "P"ersonal (?) model. All of the lines were to have from 64K to 256K of memory, in 64K increments (so four models per line), and were to be identical except for the graphics chip (the VIC-II in the P and the CRTC in the B). Three case designs were also initially considered: the LP "Low Profile" model, typewriter style and flat to be used with an external monitor; the HP "High Profile" model with an internal monitor and separated keyboard; and an unnamed third design based on the HP with an internal drive. The cases for the new line were created by designer Ira Velinsky, who created a sloped, "ergonomic" and futuristic feel for the line designed to appeal to higher-end buyers using his own design cues from the current -SK ("Separated Keyboard") PETs, such as the PET 200. According to On the Edge, the systems were developed 1981-2 under the auspices of Charles Winterble, Commodore's head of engineering, and were originally envisioned on a concept created at the Porsche Design Center in Stuttgart, Germany. Unfortunately, although innovative, the Porsche design was ultimately rejected as too impractical and Velinsky's design was used instead.

(As a footnote, Ira Velinsky's design skill proved very popular with Commodore management and he went on to develop the case for the TED prototype [what would become the 116] while working for Sam Tramiel at Commodore Japan, along with the case for the ill-starred Ultimax, and is also credited with creating Commodore's distinctive 64 cartridge case design. Before leaving for Atari, Velinsky's final job was the case of the 900.)

Later on in the line's development, the 192K variant was dumped and Commodore came up with a uniform numbering scheme. Model numbers ending in 05 were to have 64K, model numbers ending in 10 to have 128K, and model numbers ending in 20 to have 256K. The P500, released as a prototype, gave way to the European 'B' 500s (the 256K 520 was never released, although Bill Degnan has a 520 prototype, and Bo Zimmerman has a 256K B500); the LP series became the 600s, based on the B500s (though there is some evidence to propose that the 600s were actually descendants of the 700s; see that entry); and the HPs became the 700s, also based on the B500s. The internal drive variants of the HP also were released. Of the 05 models, only the 505 materialised (there is no 605 or 705), and only the 600s and higher have 20 models extant.

Eventually, the Grim Computer Reaper caught up. Bugs in the systems' BASIC ROMs were crippling and development was only in mid-stride before the units were pushed out to be manufactured. As the Commodore 64 slowly took off to its legendary status, Commodore dropped the ailing B/P series in favour of their PC compatible line and released the PC-10 instead. As for the PETs themselves, they actually outlasted their intended successors. Commodore continued to sell the SK models, including the 200/8032-SK, 8096-SK and 8296-D, for some time afterwards until sales made them no longer profitable.

Don't cry for the lost 6509s, though. At least one 6509 survived, the D128, though not in its original form, and eventually with a different microprocessor that while less finicky than its predecessor superficially preserved many of the banking and memory management ideas first introduced in the 6509. That machine became the 128.

The P500

Steve Gray's CBM-II Page
Larry Anderson's P500 Page

aka P128, 'C' Series, PET-II (very, very early Commodore literature), C128-40
Introduced Never officially.
Hardware 6509 CPU @ 1MHz, 24K ROM; 128K RAM, expandable to max 256K internal and 704K external. May have been intended to have two 5.25" floppies, detachable keyboard (like the 700s; apparently, this never came to fruition, as pictures of the few existing P500s show them to be very similar to the 600s. IEEE-488 bus, RS232C, dual 8-bit user port.
Graphics and Sound Identical to the 64; 6581 SID; 6569 VIC-II.
Eventual Fate Released as beta models with the 600/B128 but never publicly rolled out. Replaced by the B500/600 series in Europe and the B128 in the States.

Comments
The P500 has notable similarities to the D128 development model, but they are not the same computer.

Early Commodore circulars claim the P500 was to have 40K ROM, not 24; Z-80 and 8088 CPUs were to be available as "optional future processors". UCSD Pascal was also another language option. None materialized.

Because of the identical graphics and sound hardware, Commodore was planning to release versions of 64 software rewritten for the 500s. This never came to pass.

There is a drastic difference in availability of these machines on either side of the Atlantic; while European versions turn up from time to time (thus with PAL VIC-IIs), the USA version is vanishingly rare thanks to yet another interesting Commodore bungle. According to Larry Anderson, Commodore released several demo B128/600s and P500s to stores to entice consumers to buy the then-in-development units. These units were not fully operational, and had not been FCC certified in the United States, but dealers sold them anyway to the great ire of the FCC, which proceeded to threaten Commodore with penalties unless Commodore pulled all the units back (with the exception of the units sold or units the stores would not return). However, once Commodore discovered that the 64 was much more popular (not to mention cheaper to manufacture) than the P500, the P500 was pulled from rollout and was never to return. Rumours persist that the P500s remaining were 'bulldozed' literally -- run over with a bulldozer to turn them into scrap plastic and silicon -- but nevertheless at least one American unit is confirmed to exist, and hopefully a couple of others. On the other hand, European P500s, while hardly common, are much easier to locate. Presumably Commodore learned its lesson from its run-in with the American FCC?

The P500's screen is superficially similar to the SX-64's; it starts up with a white screen and cyan border and the startup message *** commodore basic 128, v4.0 ***.

As reported by Anders Carlsson, MicroComputer Printout 1/82 states that the P500 was also called the VIC-40, as opposed to the other VIC-40. Four months later in 5/82, the same magazine asserts it will be the new "Commodore 64" (or possibly the B500, given the presence of BASIC 4). These unusual code designations did not last long.

Despite its never being officially released in the United States, the P500 still appeared in American B Series manuals anyway (as the C128-40).

The B (500) Series

Complete Views of the B500 (.jpg, courtesy Hans Franke)
Portrait (29K) | Backplate (16K, with enlargement of rear decal) | Mainboard (100K) | Keyboard Matrix (41K)

Introduced April 1982
Hardware 6509 CPU @ 1MHz, 24K ROM; 128K RAM (in this unit; supposedly ranged from 64K to 256K) expandable to max 256K internal and 704K external. Rumoured intentions to have two 5.25" floppies, detachable keyboard (like the 700s). Apparently, this never came to fruition either, as again pictures of the few existing 510s show them to be very similar to the 600s. IEEE-488 bus, RS232C, dual 8-bit user port.
Graphics and Sound 6581 SID; 6545 CRTC.
Eventual Fate The B500 was never released, though the later 505 and 510 models were announced in Europe. The 256K 520 apparently existed only in small quantities (see above). Not certain how many sold or when it was discontinued. Probably never released in the States. Based on the use of the same part numbers in the B128/600 series, according to Ullrich, the B500 is likely an early name or incarnation of the 600 design.

Comments
Unlike the P500, the B500 series were very similar to the 600/B128 series, but kept the joyport (annoyingly, there's no hole on the back for this, though it is fully wired into the board). In all other facets, the B500 series are largely identical with their descendants, the 600s. Based on the fact that even the part numbers are the same, it's just about impossible to tell if a bare motherboard is a B500 or 600 series (as I found out when I ended up with one).

There are supposedly three in the 500 line: the 520 with 256K, the 505 with 64K and the 510 with 128K. The 520 was never announced, although Bill Degnan and Bo Zimmerman have models matching the description, and the 500 was never released either although some were actually manufactured also (Ian Moote's model has a production serial number, which means there must have been at least one run). Hans' system above is probably a prototype like the US P500, further proof coming from the very old chip date codes and the ROMs, which are piggybacked ROM/EPROMs. Hans doubts that any 500 series systems were actually sold, but if any made it to the outside world, they are likely 510s.

Note that the external video port is generally compatible with standard Commodore 5-pin video cables.

The B500s survive in the form of ...

The 600 Series (B128)

Complete Views of the B128 (American B128-80) (.jpg, my unit)
Portrait (69K) | Rear Ports (36K) | Backplate (21K) | Mainboard (141K) | Mainboard closeups: "CBM2 LP" ROM and unpopulated RAM (126K) | CRTC, CPU and SID (78K)

Additional Views of the B128 (610) (.jpg, courtesy Ullrich von Bassewitz): Portrait (13K) | Keyboard Closeup (79K) | Mainboard (91K) | Under Keyboard (19K) | Rear Ports (34K; 510 model backplate -- the 610 does not have joyports or external user port by default)

Steve Gray's CBM-II Page
Ullrich von Bassewitz's 600 Series Page

.gif Advertisement for the 600 (107K) -- see index page for credits
.gif Advertisement for the 600 and SuperPET (167K) -- see index page for credits
ROMs and Software for the B128/B256 (from FUnet)

aka B128 (U.S.), 600 (Europe), "CBM II Low Profile", CBM 128-80, B128-80
Introduced June 1982
Hardware 6509A CPU @ 2MHz (600 and 700 at 1MHz, though), 40K ROM, 128K RAM (610/710) or 256K RAM (620/630/720/730) and up to 704K external (banking scheme described below); 6551 ACIA with external RS232-C port (19.2 kbaud max). Commodore circulars also mention IEEE-488 capability.
Graphics and Sound 80x25 6545 CRTC (8x8 character matrix), 6581 SID, 6525 TPI (triport interface) keyboard interface.
Eventual Fate Released. No official discontinuation date or sales figures. Apparently fared poorly.

Comments
The B128/600 series are the direct inheritors of the B500, and seem to be identical in all respects except name and memory configuration.

The B128 appears to be referred to in early Commodore circulars, but interestingly as a variant of the 700s -- "version also to be available excluding integral disk and with external VDU option" (read: no internal disk drive and no monitor) -- and not as a model in its own right.

The American B128 is surmised to be identical to the European 610, mostly on guesses from volume produced.

Like the B500 series, the external video port on the B128/600 series is generally compatible with standard Commodore 5-pin video cables.

See the 700 series for additional comments on both series.

The 700 Series (B256)

.jpg Photograph of the 700 (9K)
.gif Photograph of the 700 (6K)
ROMs and Software for the B128/B256 (from FUnet)

aka B256 (U.S.), 700s (Europe), "CBM II High Profile", CBM 256-80, B256-80, PET 700
Introduced April 1982
Hardware Identical to the 600. Integrated monitor, detachable keyboard, different character generator ROM (see Graphics and Sound), two 5.25" disk drives. Optional 8088 chip (see BX256).
Graphics and Sound Identical to the 600, except that character graphics were generated off an 8x14 matrix. The Kernal, identical in the 600 and 700 series, determined which generator to use based on inputs hard-soldered on the mainboard.
Eventual Fate Released. No known discontinuation date or sales figures. Apparently fared poorly.

Comments
The US B256 is surmised to be a 720, guessed mostly from volume produced.

Early Commodore circulars claimed maximum memory to be 896K for the 700s. A Z-80 was supposedly offered as an option (which jibes with the Z-80 card mention in the 730s; see that entry below). Optimistically, the monitor is billed as "Easy Read Green Phosphor" (oh, really?) and apparently can swivel and tilt.

The 700 series appear in the 1985 Michael Douglas-Kathleen Turner romance/adventure Jewel of the Nile, the sequel to Romancing the Stone (IMDb link). Here is a Blu-ray screen grab (78K) showing, right to left, what appears to be an 8032-SK or relative, then two uncertain drives (probably 2031s or maybe SFD 1001s?) and finally what appears to be a 700 of some form. By this late date, these units were undoubtedly picked up on the used market, but it is nice to see that they were apparently still in working order. The Jewel screengrab above also gives one a (blurry) comparison of how the P units looked next to their SK predecessors.

Strange that a computer like the 600s and 700s with little better than terminal-quality graphics would have SID chip in its line-up. There are some reports that some 700s may have had a 7.5MB hard disk (unconfirmed, could be a repackaged CBM D9090), but both the 600s and 700s could take internal disk drives. The address decoder has an unused output line mapping to $d900 marked as "disk units" in the 600s, and there is 4K in the machine's bank 15 (see What's A 6509, Anyway? for an explanation of 6509 banking) marked "Disk ROM".

The 600s and 700s both shared the same Kernal, as stated, but the BASIC versions differ; one version is in the 128K 610 and 710, and another in the 256K 620, 630, 720 and 730. Note that unlike the 710 and 720, the 700 is actually a low profile model (Jim Brain). Jim Brain also notes the existence of the 740 and 750, as well as a mythical 760 with three processors and 1MB RAM. (!)

Ullrich von Bassewitz notes that since the SID is really a 1MHz chip being clocked at 2MHz, it is impossible to read any values out of the few readable registers the SID has anyway.

While the 600s and 700s have cassette ports, the ROM has no code to drive them.

There are Swedish-localized versions of the 610 and 720, and possibly others.

The 700 has an unusual internal video connector, as shown in the user's manual:

    Pin     Type
     1      Video
     2      GND
     3      Vertical Sync
     4      GND
     5      Horizontal Sync
     6      Key
     7      GND

The BX Series (630/730)

.jpg Scan of BX256-80 Commodore Advertisement (98K, courtesy Steve Gray)

.jpg Photo of 8088 Coprocessor Card (115K, courtesy Bruce Faierson)

aka BX700, CBMX 128-80 (128K version), CBMX 256-80
Introduced 1983
Hardware Identical to the 600 and 700 series, 8088 chip came standard, clocked at 4MHz (says "das Programmier Handbuch für CBM 600/700"; the German service manual for the 600/700 says 5MHz). 128 and 256K RAM.
Graphics and Sound Identical to the 700s.
Eventual Fate Released.

Comments
Because of the 8088, Commodore billed the BX series as 16-bit in the regular marketing balderdash they were swilling at the time. The "X", reportedly standing for "extra processor", was simply an upgraded version of the existing 600 and 700 computers; the 600 series computers with the extra 8088 received the BX moniker (BX128, BX256) and the 700 series computers, the CBMX designation.

In the BXes, the 6509 was relegated to I/O, keyboard scanning and display maintenance through an unknown method. Reports state that this allows users to use CP/M-86 and MS-DOS (!) on these units. The 700s and 600s themselves could accept an 8088 card to become BXes, and Steve Gray has found a NorthWest Music ad that confirms the cards do exist (apparently released as part of an inventory dump during the mid 1980's); this is confirmed by Bruce Faierson, NorthWest's former owner, who contributes the picture above. According to the ad, CP/M-86 ran quite well on these amphibious beasts.

There is also supposedly a Z80 card that runs at 4.5MHz, but its only mention is in the German service manual for these units (Ullrich); a Transactor clipping alleges that the Z8001, the processor used in the CBM 900, was also offered but no such card has ever been seen.

What's a 6509, Anyway?

A 6509 is a 6502 with locations $0 and $1 used for banking. Although this sounds like the 6510 in the regular C64, the 6510 actually has an I/O port which was simply made to handle banking with the same lines, while the 6509 truly has a specific "primitive MMU" of sorts controlled by these locations such that $0 sets the execution bank, and $1 sets the indirection bank (see below). Since Commodore owned MOS Technology, they could, and did, make many sorts of weirdly tweaked 6502s.

Here's how it plays out in practice (thanks to Ullrich von Bassewitz and Andre Fachat for the explanation). The 6509 has 20 address lines (meaning up to 1MB memory access), with RAM in banks 1-4 (not 0-3 as you would think) and bank 15 being I/O and ROM. Using zero page indirect addressing, the 6509 puts the contents of the register at address $01 on the high 4 address lines to get at memory in other banks. The other internal register at address $0 determines from which 64K bank the processor executes out of. This register defaults to 15 on startup, implying that the system bank is 15, just like the 128. Of course, the 8502 definitely doesn't bankswitch this way; the 8502 uses its 6510-like internal I/O port and the MMU, while this process is entirely internal to the 6509.

Here's some sample code, based on an example by Andre:

   ; copy $c000-$c0ff from bank 1 to bank 2
     lda #0
     sta $fd
     lda #192
     sta $fe

   ; get byte from bank 1
     ldy #0
lup  ldx #1
     stx $01
     lda ($fd),y
   ; store in bank 2
     ldx #2
     stx $01
     sta ($fd),y
     iny
     bne lup
This only works for LDA and STA. All other zero page indirect addressing behaves like the normal 6502.

The standard memory layout in the 6509 series doesn't make much sense. The default system bank has only about 1K free (though most users had an internal 4K expansion that mapped to the $C000-$CFFF space), which meant that programs had to reside in the other banks. Unfortunately, making these kinds of "far calls," to borrow the Intel-ism, was nightmarish because, unlike the 128's equally snarled banking scheme, there was no ROM at all in any of the other banks. Programs running in them had to have all their own routines for handling I/O and interrupts because the 6509 could not far-call back to the system bank to use the routines there.

The VIC-II in the P500 maps to its usual spot, $d000, but in bank 0. Video architecture, obviously, is slightly different between the P500 and the other CRTC-based 6509 systems; where the 2K 80-column screen memory of the 600s and up would normally be is the 1K 40-column screen matrix and the 1K colour memory, also in bank 0. Interestingly, Ullrich notes that because this series puts BASIC text in bank 1, this means that the VIC-II in the P500 can display high-resolution images out of bank 0 and not take any memory away from a BASIC program.

One would expect that banks 5-14 were where expanded RAM mapped, but Andre notes that the PLA only provides RAS/CAS for four banks (256K) total. Some other method would be required to get access to that memory, and that method is provided, according to Ullrich, in "Heute Schon Geused" (the newsletter for an obscure 610 users group in Germany). While the newsletter has since disappeared, one conceivable method to get the 6509s up to 1MB would be to replace the 4164 RAM chips with 41256s, and shift the PLA address lines up by two (i.e., A16 to A18 and A17 to A19).